5adf684f59
This PR removes the multi-threading infrastructure from SRS and consolidates the codebase to use single-thread architecture exclusively. This is a architectural simplification that aligns with SRS's coroutine-based design philosophy. * Simplified Architecture: Eliminates complexity of multi-threading coordination * Better Alignment: Matches SRS's coroutine-based single-thread design philosophy * Reduced Complexity: Removes potential race conditions and threading bugs * Cleaner Code: More focused modules with clear responsibilities * Easier Maintenance: Fewer moving parts and clearer execution flow --------- Co-authored-by: OSSRS-AI <winlinam@gmail.com>
149 lines
4.4 KiB
C++
149 lines
4.4 KiB
C++
//
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// Copyright (c) 2013-2025 The SRS Authors
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//
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// SPDX-License-Identifier: MIT
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//
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#include <srs_app_circuit_breaker.hpp>
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#include <srs_app_config.hpp>
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#include <srs_app_hybrid.hpp>
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#include <srs_app_utility.hpp>
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#include <srs_kernel_kbps.hpp>
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#include <srs_kernel_utility.hpp>
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#ifdef SRS_RTC
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#include <srs_app_statistic.hpp>
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extern SrsPps *_srs_pps_snack2;
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extern SrsPps *_srs_pps_snack3;
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extern SrsPps *_srs_pps_snack4;
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#endif
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using namespace std;
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ISrsCircuitBreaker::ISrsCircuitBreaker()
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{
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}
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ISrsCircuitBreaker::~ISrsCircuitBreaker()
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{
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}
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SrsCircuitBreaker::SrsCircuitBreaker()
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{
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enabled_ = false;
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high_threshold_ = 0;
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high_pulse_ = 0;
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critical_threshold_ = 0;
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critical_pulse_ = 0;
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dying_threshold_ = 0;
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dying_pulse_ = 0;
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hybrid_high_water_level_ = 0;
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hybrid_critical_water_level_ = 0;
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hybrid_dying_water_level_ = 0;
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}
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SrsCircuitBreaker::~SrsCircuitBreaker()
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{
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}
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srs_error_t SrsCircuitBreaker::initialize()
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{
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srs_error_t err = srs_success;
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enabled_ = _srs_config->get_circuit_breaker();
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high_threshold_ = _srs_config->get_high_threshold();
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high_pulse_ = _srs_config->get_high_pulse();
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critical_threshold_ = _srs_config->get_critical_threshold();
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critical_pulse_ = _srs_config->get_critical_pulse();
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dying_threshold_ = _srs_config->get_dying_threshold();
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dying_pulse_ = _srs_config->get_dying_pulse();
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// Update the water level for circuit breaker.
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// @see SrsCircuitBreaker::on_timer()
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_srs_hybrid->timer1s()->subscribe(this);
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srs_trace("CircuitBreaker: enabled=%d, high=%dx%d, critical=%dx%d, dying=%dx%d", enabled_,
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high_pulse_, high_threshold_, critical_pulse_, critical_threshold_,
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dying_pulse_, dying_threshold_);
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return err;
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}
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bool SrsCircuitBreaker::hybrid_high_water_level()
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{
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return enabled_ && (hybrid_critical_water_level() || hybrid_high_water_level_);
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}
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bool SrsCircuitBreaker::hybrid_critical_water_level()
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{
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return enabled_ && (hybrid_dying_water_level() || hybrid_critical_water_level_);
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}
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bool SrsCircuitBreaker::hybrid_dying_water_level()
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{
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return enabled_ && dying_pulse_ && hybrid_dying_water_level_ >= dying_pulse_;
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}
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srs_error_t SrsCircuitBreaker::on_timer(srs_utime_t interval)
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{
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srs_error_t err = srs_success;
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// Update the CPU usage.
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srs_update_proc_stat();
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SrsProcSelfStat *stat = srs_get_self_proc_stat();
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// Reset the high water-level when CPU is low for N times.
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if (stat->percent * 100 > high_threshold_) {
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hybrid_high_water_level_ = high_pulse_;
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} else if (hybrid_high_water_level_ > 0) {
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hybrid_high_water_level_--;
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}
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// Reset the critical water-level when CPU is low for N times.
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if (stat->percent * 100 > critical_threshold_) {
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hybrid_critical_water_level_ = critical_pulse_;
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} else if (hybrid_critical_water_level_ > 0) {
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hybrid_critical_water_level_--;
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}
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// Reset the dying water-level when CPU is low for N times.
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if (stat->percent * 100 > dying_threshold_) {
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hybrid_dying_water_level_ = srs_min(dying_pulse_ + 1, hybrid_dying_water_level_ + 1);
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} else if (hybrid_dying_water_level_ > 0) {
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hybrid_dying_water_level_ = 0;
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}
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// Show statistics for RTC server.
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SrsProcSelfStat *u = srs_get_self_proc_stat();
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// Resident Set Size: number of pages the process has in real memory.
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int memory = (int)(u->rss * 4 / 1024);
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// The hybrid thread cpu and memory.
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float thread_percent = stat->percent * 100;
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string snk_desc;
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#ifdef SRS_RTC
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static char buf[128];
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if (_srs_pps_snack2->r10s()) {
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snprintf(buf, sizeof(buf), ", snk=%d,%d,%d",
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_srs_pps_snack2->r10s(), _srs_pps_snack3->r10s(), _srs_pps_snack4->r10s() // NACK packet,seqs sent.
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);
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snk_desc = buf;
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}
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#endif
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if (enabled_ && (hybrid_high_water_level() || hybrid_critical_water_level())) {
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srs_trace("CircuitBreaker: cpu=%.2f%%,%dMB, break=%d,%d,%d, cond=%.2f%%%s",
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u->percent * 100, memory,
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hybrid_high_water_level(), hybrid_critical_water_level(), hybrid_dying_water_level(), // Whether Circuit-Break is enable.
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thread_percent, // The conditions to enable Circuit-Breaker.
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snk_desc.c_str());
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}
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return err;
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}
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ISrsCircuitBreaker *_srs_circuit_breaker = NULL;
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